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145 lines
4.2 KiB
145 lines
4.2 KiB
15 years ago
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; list p=16f871 ; list directive to define processor
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#include <p16f871.inc> ; processor specific variable definitions
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__CONFIG _CP_OFF & _WDT_OFF & _BODEN_OFF & _PWRTE_ON & _XT_OSC & _WRT_ENABLE_ON & _LVP_OFF & _CPD_OFF
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;__CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _EXTRC_CLKOUT
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;**********************************************************************
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M_SAVE_STATE macro
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mov wf w_saved
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movfw STATUS
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movwf status_saved
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endm
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M_RESTORE_STATE macro
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movfw status_saved
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movwf STATUS
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swapf w_saved,f
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swapf w_saved,w
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endm
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BANK0 = 0x0
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BANK1 = 0x80
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BANK2 = 0x100
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BANK3 = 0x180
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;**********************************************************************
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INT_VAR UDATA_SHR
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w_saved RES 1 ; variable used for context saving
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status_saved RES 1 ; variable used for context saving
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TEMP_VAR UDATA_SHR
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count RES 1
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count2 RES 1
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ledA RES 1
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ledC RES 1
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ledB RES 1
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;**********************************************************************
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STARTUP CODE 0x000 ; processor reset vector
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nop ; for debugger
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movlw high start ; load upper byte of 'start' label
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movwf PCLATH ; initialize PCLATH
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goto start ; go to beginning of program
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;**********************************************************************
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INT_VECTOR CODE 0x004 ; interrupt vector location
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goto interrupt
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;**********************************************************************
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PROG1 CODE
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interrupt
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M_SAVE_STATE
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M_SAVE_STATE ; try using twice a macro
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; increment duty cycle
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; btfss CCP1CON ^ BANK0,4
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; goto duty_cycle_inc_bit0
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; bcf CCP1CON ^ BANK0,4
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; btfss CCP1CON ^ BANK0,5
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; goto duty_cycle_inc_bit1
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; bcf CCP1CON ^ BANK0,5
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; incfsz CCPR1L ^ BANK0,f
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; goto update_duty_cycle_done
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;duty_cycle_inc_bit0
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; bsf CCP1CON ^ BANK0,4
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; goto update_duty_cycle_done
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;duty_cycle_inc_bit1
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; bsf CCP1CON ^ BANK0,5
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;update_duty_cycle_done
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; increment count
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decfsz count,1
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goto done
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movlw .10
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movwf count
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; blink and output
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movfw ledB
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xorlw B'00001111'
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movwf ledB
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movwf PORTB
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done
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bcf INTCON,2 ; reset TMR0 interrupt flag
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M_RESTORE_STATE
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retfie ; return from interrupt
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;**********************************************************************
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start
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; initialize microchip
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clrf TMR0 ^ BANK0
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clrf INTCON ^ BANK0
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; clrf PORTA ^ BANK0
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clrf PORTB ^ BANK0
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; clrf PORTC ^ BANK0
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; clrf PORTD ^ BANK0
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; clrf PORTE ^ BANK0
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banksel TRISA ; bank 1
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; clrf TRISA ^ BANK1 ; all outputs
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clrf TRISB ^ BANK1 ; all outputs
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; clrf TRISC ^ BANK1 ; all outputs
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; clrf TRISD ^ BANK1 ; all outputs
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; clrf TRISE ^ BANK1 ; all outputs
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movlw B'11010101' ; set prescaler to 64
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movwf OPTION_REG ^ BANK1 ; and start TMR0 (internal source clock)
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; movlw B'00000110' ; set PORTA and PORTE to be all digital
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; movwf ADCON1 ^ BANK1
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banksel INTCON ; back to bank 0
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bsf INTCON,T0IE ; enable TMR0 interrupt
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bsf INTCON,GIE ; enable all interrupts
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; initialize PWM
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; CLRF CCP1CON ^ BANK0 ; disable CCP module
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; CLRF TMR2 ^ BANK0 ; clear Timer2 (also set the pre-scaler to 1)
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; MOVLW .1
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; MOVWF CCPR1L ^ BANK0 ; set duty cycle = (CCPR1L+1)/(PR2+1) [25% for (31+1)/(127+1)]
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; banksel PR2 ; select bank 1
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; MOVLW .255
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; MOVWF PR2 ^ BANK1 ; set period = Fosc/4/pre-scaler/(PR2+1)
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; BCF TRISC ^ BANK1,2 ; set CCP1 pin as output
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; banksel PIR1 ; back to bank 0
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; MOVLW B'001100'
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; MOVWF CCP1CON ^ BANK0 ; set PWM mode (the 2 LSBs of the duty cycle are set to '00')
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; BSF T2CON ^ BANK0,TMR2ON ; Timer2 starts to increment
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; The CCP1 interrupt is disabled,
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; do polling on the TMR2 Interrupt flag bit
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;PWM_Period_Match
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; BTFSS PIR1, TMR2IF
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; GOTO PWM_Period_Match
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; Update this PWM period and the following PWM Duty cycle
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; BCF PIR1, TMR2IF
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; initialize variables
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movlw B00000101'
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movwf ledB
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movlw .10
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movwf count
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; loop forever
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goto $
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;**********************************************************************
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END
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