Fix prior commit

11 years ago · 26c1236cdc
parent 5c2d024b38
commit 26c1236cdc
1 changed files with 1 additions and 1 deletions
--- a/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v
+++ b/fpga/xilinx/digilent/spartan_6/s6_remotefpga_test/main.v
@ -296,7 +296,7 @@ module sample_image_processing_demo(clk, wren, dout, addr, din, enable, done);
 	output reg done;
 	reg prev_enable;
-	reg [(IMAGE_RAM_ADDR_BITS-1):0] counter;
+	reg [IMAGE_RAM_ADDR_BITS:0] counter;
 	reg toggler;
 	always @(posedge clk) begin