Copyright (c) 2005 Juan Pablo D. Borgna Copyright (c) 2005 Instituto Nacional de Tecnología Industrial Copyright (c) 2001, 2002 by David Sullins Licese: GPL por bitfile.c jbit: ----- This script is a shortcut for programming a device using the GNU JTAG program with a .bit file. It generates and deletes the intermediate SVF file. It can read a personal config, refer to jbitrc_sample.txt. Sample: bit2svf$ ./jbit ejemplo_prom.bit XC18V01 jbit - bit2svf/jtag short cut - v1.0 Copyright (c) 2005 Juan Pablo D. Borgna/INTI Creando archivo temporario /tmp/bit2svf.tmp bit2svf - SVF file generator - v1.0 Copyright (c) 2005 Juan Pablo D. Borgna/INTI Bit file created on 2004/08/25 at 13:43:18. Created from file ejemplo.ncd for Xilinx part 2s100pq208. Bitstream length is 97652 bytes. Process finsished sucefully. Creado ok Invocando /home/jpablo/usr/bin/jtag Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0 IR length: 8 Chain length: 1 Device Id: 00000101000000100100000010010011 Manufacturer: Xilinx Part: XC18V01-SO20 Stepping: 1 Filename: /home/jpablo/usr//share/jtag/xilinx/xc18v01-so20/xc18v01-so20 Warning svf: checking of TDO not supported for SIR. This message is only displayed once. Borrando temporarios.. Que tenga un buen dia :-) bit2svf: -------- This program generates a SVF file wich using the program JTAG it is possible to program a FPGA or PROM. Sample: bit2svf$ ./bit2svf ejemplo_prom.bit ejemplo_prom.svf XC18V01 Bit file created on 2004/08/25 at 13:43:18. Created from file ejemplo.ncd for Xilinx part 2s100pq208. Bitstream length is 97652 bytes. Process finsished sucefully.