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254 lines
7.3 KiB
254 lines
7.3 KiB
/*
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* motion_comp_alpha.c
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* Copyright (C) 2002-2003 Falk Hueffner <falk@debian.org>
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*
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* This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
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* See http://libmpeg2.sourceforge.net/ for updates.
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*
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* mpeg2dec is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* mpeg2dec is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "config.h"
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#ifdef ARCH_ALPHA
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#include "k9common.h"
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#include "mpeg2.h"
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#include "attributes.h"
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#include "mpeg2_internal.h"
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#include "alpha_asm.h"
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static inline uint64_t avg2 (uint64_t a, uint64_t b)
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{
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return (a | b) - (((a ^ b) & BYTE_VEC (0xfe)) >> 1);
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}
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// Load two unaligned quadwords from addr. This macro only works if
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// addr is actually unaligned.
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#define ULOAD16(ret_l,ret_r,addr) \
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do { \
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uint64_t _l = ldq_u (addr + 0); \
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uint64_t _m = ldq_u (addr + 8); \
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uint64_t _r = ldq_u (addr + 16); \
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ret_l = extql (_l, addr) | extqh (_m, addr); \
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ret_r = extql (_m, addr) | extqh (_r, addr); \
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} while (0)
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// Load two aligned quadwords from addr.
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#define ALOAD16(ret_l,ret_r,addr) \
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do { \
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ret_l = ldq (addr); \
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ret_r = ldq (addr + 8); \
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} while (0)
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#define OP8(LOAD,LOAD16,STORE) \
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do { \
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STORE (LOAD (pixels), block); \
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pixels += line_size; \
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block += line_size; \
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} while (--h)
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#define OP16(LOAD,LOAD16,STORE) \
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do { \
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uint64_t l, r; \
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LOAD16 (l, r, pixels); \
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STORE (l, block); \
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STORE (r, block + 8); \
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pixels += line_size; \
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block += line_size; \
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} while (--h)
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#define OP8_X2(LOAD,LOAD16,STORE) \
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do { \
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uint64_t p0, p1; \
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\
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p0 = LOAD (pixels); \
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p1 = p0 >> 8 | ((uint64_t) pixels[8] << 56); \
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STORE (avg2 (p0, p1), block); \
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pixels += line_size; \
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block += line_size; \
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} while (--h)
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#define OP16_X2(LOAD,LOAD16,STORE) \
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do { \
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uint64_t p0, p1; \
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\
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LOAD16 (p0, p1, pixels); \
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STORE (avg2(p0, p0 >> 8 | p1 << 56), block); \
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STORE (avg2(p1, p1 >> 8 | (uint64_t) pixels[16] << 56), \
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block + 8); \
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pixels += line_size; \
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block += line_size; \
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} while (--h)
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#define OP8_Y2(LOAD,LOAD16,STORE) \
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do { \
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uint64_t p0, p1; \
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p0 = LOAD (pixels); \
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pixels += line_size; \
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p1 = LOAD (pixels); \
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do { \
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uint64_t av = avg2 (p0, p1); \
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if (--h == 0) line_size = 0; \
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pixels += line_size; \
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p0 = p1; \
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p1 = LOAD (pixels); \
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STORE (av, block); \
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block += line_size; \
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} while (h); \
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} while (0)
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#define OP16_Y2(LOAD,LOAD16,STORE) \
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do { \
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uint64_t p0l, p0r, p1l, p1r; \
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LOAD16 (p0l, p0r, pixels); \
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pixels += line_size; \
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LOAD16 (p1l, p1r, pixels); \
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do { \
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uint64_t avl, avr; \
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if (--h == 0) line_size = 0; \
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avl = avg2 (p0l, p1l); \
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avr = avg2 (p0r, p1r); \
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p0l = p1l; \
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p0r = p1r; \
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pixels += line_size; \
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LOAD16 (p1l, p1r, pixels); \
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STORE (avl, block); \
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STORE (avr, block + 8); \
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block += line_size; \
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} while (h); \
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} while (0)
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#define OP8_XY2(LOAD,LOAD16,STORE) \
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do { \
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uint64_t pl, ph; \
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uint64_t p1 = LOAD (pixels); \
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uint64_t p2 = p1 >> 8 | ((uint64_t) pixels[8] << 56); \
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\
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ph = (((p1 & ~BYTE_VEC (0x03)) >> 2) + \
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((p2 & ~BYTE_VEC (0x03)) >> 2)); \
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pl = ((p1 & BYTE_VEC (0x03)) + \
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(p2 & BYTE_VEC (0x03))); \
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\
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do { \
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uint64_t npl, nph; \
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\
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pixels += line_size; \
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p1 = LOAD (pixels); \
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p2 = (p1 >> 8) | ((uint64_t) pixels[8] << 56); \
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nph = (((p1 & ~BYTE_VEC (0x03)) >> 2) + \
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((p2 & ~BYTE_VEC (0x03)) >> 2)); \
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npl = ((p1 & BYTE_VEC (0x03)) + \
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(p2 & BYTE_VEC (0x03))); \
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\
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STORE (ph + nph + \
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(((pl + npl + BYTE_VEC (0x02)) >> 2) & \
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BYTE_VEC (0x03)), block); \
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\
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block += line_size; \
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pl = npl; \
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ph = nph; \
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} while (--h); \
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} while (0)
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#define OP16_XY2(LOAD,LOAD16,STORE) \
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do { \
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uint64_t p0, p1, p2, p3, pl_l, ph_l, pl_r, ph_r; \
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LOAD16 (p0, p2, pixels); \
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p1 = p0 >> 8 | (p2 << 56); \
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p3 = p2 >> 8 | ((uint64_t)pixels[16] << 56); \
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\
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ph_l = (((p0 & ~BYTE_VEC (0x03)) >> 2) + \
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((p1 & ~BYTE_VEC (0x03)) >> 2)); \
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pl_l = ((p0 & BYTE_VEC (0x03)) + \
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(p1 & BYTE_VEC(0x03))); \
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ph_r = (((p2 & ~BYTE_VEC (0x03)) >> 2) + \
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((p3 & ~BYTE_VEC (0x03)) >> 2)); \
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pl_r = ((p2 & BYTE_VEC (0x03)) + \
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(p3 & BYTE_VEC (0x03))); \
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\
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do { \
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uint64_t npl_l, nph_l, npl_r, nph_r; \
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\
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pixels += line_size; \
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LOAD16 (p0, p2, pixels); \
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p1 = p0 >> 8 | (p2 << 56); \
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p3 = p2 >> 8 | ((uint64_t)pixels[16] << 56); \
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nph_l = (((p0 & ~BYTE_VEC (0x03)) >> 2) + \
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((p1 & ~BYTE_VEC (0x03)) >> 2)); \
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npl_l = ((p0 & BYTE_VEC (0x03)) + \
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(p1 & BYTE_VEC (0x03))); \
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nph_r = (((p2 & ~BYTE_VEC (0x03)) >> 2) + \
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((p3 & ~BYTE_VEC (0x03)) >> 2)); \
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npl_r = ((p2 & BYTE_VEC (0x03)) + \
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(p3 & BYTE_VEC (0x03))); \
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\
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STORE (ph_l + nph_l + \
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(((pl_l + npl_l + BYTE_VEC (0x02)) >> 2) & \
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BYTE_VEC(0x03)), block); \
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STORE (ph_r + nph_r + \
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(((pl_r + npl_r + BYTE_VEC (0x02)) >> 2) & \
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BYTE_VEC(0x03)), block + 8); \
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\
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block += line_size; \
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pl_l = npl_l; \
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ph_l = nph_l; \
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pl_r = npl_r; \
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ph_r = nph_r; \
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} while (--h); \
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} while (0)
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#define MAKE_OP(OPNAME,SIZE,SUFF,OPKIND,STORE) \
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static void MC_ ## OPNAME ## _ ## SUFF ## _ ## SIZE ## _alpha \
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(uint8_t *restrict block, const uint8_t *restrict pixels, \
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int line_size, int h) \
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{ \
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if ((uint64_t) pixels & 0x7) { \
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OPKIND (uldq, ULOAD16, STORE); \
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} else { \
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OPKIND (ldq, ALOAD16, STORE); \
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} \
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}
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#define PIXOP(OPNAME,STORE) \
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MAKE_OP (OPNAME, 8, o, OP8, STORE); \
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MAKE_OP (OPNAME, 8, x, OP8_X2, STORE); \
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MAKE_OP (OPNAME, 8, y, OP8_Y2, STORE); \
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MAKE_OP (OPNAME, 8, xy, OP8_XY2, STORE); \
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MAKE_OP (OPNAME, 16, o, OP16, STORE); \
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MAKE_OP (OPNAME, 16, x, OP16_X2, STORE); \
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MAKE_OP (OPNAME, 16, y, OP16_Y2, STORE); \
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MAKE_OP (OPNAME, 16, xy, OP16_XY2, STORE);
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#define STORE(l,b) stq (l, b)
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PIXOP (put, STORE);
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#undef STORE
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#define STORE(l,b) stq (avg2 (l, ldq (b)), b);
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PIXOP (avg, STORE);
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mpeg2_mc_t mpeg2_mc_alpha = {
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{ MC_put_o_16_alpha, MC_put_x_16_alpha,
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MC_put_y_16_alpha, MC_put_xy_16_alpha,
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MC_put_o_8_alpha, MC_put_x_8_alpha,
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MC_put_y_8_alpha, MC_put_xy_8_alpha },
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{ MC_avg_o_16_alpha, MC_avg_x_16_alpha,
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MC_avg_y_16_alpha, MC_avg_xy_16_alpha,
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MC_avg_o_8_alpha, MC_avg_x_8_alpha,
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MC_avg_y_8_alpha, MC_avg_xy_8_alpha }
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};
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#endif
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