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233 lines
5.4 KiB
233 lines
5.4 KiB
/*
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* cpu_accel.c
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* Copyright (C) 1999-2001 Aaron Holtzman <aholtzma@ess.engr.uvic.ca>
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*
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* This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
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*
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* mpeg2dec is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* mpeg2dec is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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//#include "config.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <signal.h>
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#include <setjmp.h>
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#include <dlfcn.h>
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#define LOG_MODULE "cpu_accel"
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#define LOG_VERBOSE
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/*
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#define LOG
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*/
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#include "xineutils.h"
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#if defined(ARCH_X86) || defined(ARCH_X86_64)
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#if defined __x86_64__
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static uint32_t arch_accel (void)
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{
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uint32_t caps;
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/* No need to test for this on AMD64, we know what the
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platform has. */
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caps = MM_ACCEL_X86_MMX | MM_ACCEL_X86_SSE | MM_ACCEL_X86_MMXEXT | MM_ACCEL_X86_SSE2;
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return caps;
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}
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#else
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static uint32_t arch_accel (void)
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{
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#ifndef _MSC_VER
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uint32_t eax, ebx, ecx, edx;
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int AMD;
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uint32_t caps;
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#ifndef PIC
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#define cpuid(op,eax,ebx,ecx,edx) \
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__asm__ ("cpuid" \
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: "=a" (eax), \
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"=b" (ebx), \
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"=c" (ecx), \
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"=d" (edx) \
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: "a" (op) \
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: "cc")
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#else /* PIC version : save ebx */
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#define cpuid(op,eax,ebx,ecx,edx) \
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__asm__ ("pushl %%ebx\n\t" \
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"cpuid\n\t" \
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"movl %%ebx,%1\n\t" \
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"popl %%ebx" \
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: "=a" (eax), \
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"=r" (ebx), \
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"=c" (ecx), \
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"=d" (edx) \
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: "a" (op) \
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: "cc")
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#endif
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__asm__ ("pushfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"movl %0,%1\n\t"
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"xorl $0x200000,%0\n\t"
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"pushl %0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl %0\n\t"
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"popfl"
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: "=r" (eax),
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"=r" (ebx)
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:
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: "cc");
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if (eax == ebx) /* no cpuid */
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return 0;
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cpuid (0x00000000, eax, ebx, ecx, edx);
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if (!eax) /* vendor string only */
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return 0;
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AMD = (ebx == 0x68747541) && (ecx == 0x444d4163) && (edx == 0x69746e65);
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cpuid (0x00000001, eax, ebx, ecx, edx);
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if (! (edx & 0x00800000)) /* no MMX */
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return 0;
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caps = MM_ACCEL_X86_MMX;
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if (edx & 0x02000000) /* SSE - identical to AMD MMX extensions */
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caps |= MM_ACCEL_X86_SSE | MM_ACCEL_X86_MMXEXT;
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if (edx & 0x04000000) /* SSE2 */
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caps |= MM_ACCEL_X86_SSE2;
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cpuid (0x80000000, eax, ebx, ecx, edx);
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if (eax < 0x80000001) /* no extended capabilities */
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return caps;
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cpuid (0x80000001, eax, ebx, ecx, edx);
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if (edx & 0x80000000)
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caps |= MM_ACCEL_X86_3DNOW;
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if (AMD && (edx & 0x00400000)) /* AMD MMX extensions */
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caps |= MM_ACCEL_X86_MMXEXT;
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return caps;
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#else /* _MSC_VER */
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return 0;
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#endif
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}
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#endif /* x86_64 */
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static jmp_buf sigill_return;
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static void sigill_handler (int n) {
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longjmp(sigill_return, 1);
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}
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#endif /* ARCH_X86 */
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#if defined (ARCH_PPC) && defined (ENABLE_ALTIVEC)
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static sigjmp_buf jmpbuf;
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static volatile sig_atomic_t canjump = 0;
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static void sigill_handler (int sig)
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{
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if (!canjump) {
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signal (sig, SIG_DFL);
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raise (sig);
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}
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canjump = 0;
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siglongjmp (jmpbuf, 1);
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}
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static uint32_t arch_accel (void)
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{
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signal (SIGILL, sigill_handler);
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if (sigsetjmp (jmpbuf, 1)) {
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signal (SIGILL, SIG_DFL);
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return 0;
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}
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canjump = 1;
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__asm__ volatile ("mtspr 256, %0\n\t"
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"vand %%v0, %%v0, %%v0"
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:
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: "r" (-1));
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signal (SIGILL, SIG_DFL);
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return MM_ACCEL_PPC_ALTIVEC;
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}
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#endif /* ARCH_PPC */
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uint32_t xine_mm_accel (void)
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{
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static int initialized = 0;
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static uint32_t accel;
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if (!initialized) {
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#if defined (ARCH_X86) || (defined (ARCH_PPC) && defined (ENABLE_ALTIVEC))
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accel = arch_accel ();
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#elif defined (HAVE_MLIB)
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#ifdef MLIB_LAZYLOAD
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void *hndl;
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if ((hndl = dlopen("libmlib.so.2", RTLD_LAZY | RTLD_GLOBAL | RTLD_NODELETE)) == NULL) {
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accel = 0;
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}
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else {
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dlclose(hndl);
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accel = MM_ACCEL_MLIB;
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}
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#else
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accel = MM_ACCEL_MLIB;
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#endif
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#else
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accel = 0;
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#endif
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#if defined(ARCH_X86) || defined(ARCH_X86_64)
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#ifndef _MSC_VER
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/* test OS support for SSE */
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if( accel & MM_ACCEL_X86_SSE ) {
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void (*old_sigill_handler)(int);
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old_sigill_handler = signal (SIGILL, sigill_handler);
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if (setjmp(sigill_return)) {
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lprintf ("OS doesn't support SSE instructions.\n");
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accel &= ~(MM_ACCEL_X86_SSE|MM_ACCEL_X86_SSE2);
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} else {
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__asm__ volatile ("xorps %xmm0, %xmm0");
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}
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signal (SIGILL, old_sigill_handler);
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}
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#endif /* _MSC_VER */
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#endif /* ARCH_X86 || ARCH_X86_64 */
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if(getenv("XINE_NO_ACCEL")) {
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accel = 0;
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}
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initialized = 1;
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}
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return accel;
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}
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