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Copyright (c) 2005 Juan Pablo D. Borgna <jpborgna en inti gov ar>
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Copyright (c) 2005 Instituto Nacional de Tecnolog<6F>a Industrial
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Copyright (c) 2001, 2002 by David Sullins
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Licese: GPL por bitfile.c
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jbit:
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-----
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This script is a shortcut for programming a device using the GNU JTAG
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program with a .bit file. It generates and deletes the intermediate SVF
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file. It can read a personal config, refer to jbitrc_sample.txt.
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Sample:
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bit2svf$ ./jbit ejemplo_prom.bit XC18V01
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jbit - bit2svf/jtag short cut - v1.0
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Copyright (c) 2005 Juan Pablo D. Borgna/INTI
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Creando archivo temporario /tmp/bit2svf.tmp
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bit2svf - SVF file generator - v1.0
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Copyright (c) 2005 Juan Pablo D. Borgna/INTI
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Bit file created on 2004/08/25 at 13:43:18.
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Created from file ejemplo.ncd for Xilinx part 2s100pq208.
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Bitstream length is 97652 bytes.
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Process finsished sucefully.
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Creado ok
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Invocando /home/jpablo/usr/bin/jtag
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Initializing Xilinx DLC5 JTAG Parallel Cable III on ppdev port /dev/parport0
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IR length: 8
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Chain length: 1
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Device Id: 00000101000000100100000010010011
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Manufacturer: Xilinx
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Part: XC18V01-SO20
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Stepping: 1
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Filename: /home/jpablo/usr//share/jtag/xilinx/xc18v01-so20/xc18v01-so20
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Warning svf: checking of TDO not supported for SIR.
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This message is only displayed once.
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Borrando temporarios..
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Que tenga un buen dia :-)
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bit2svf:
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--------
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This program generates a SVF file wich using the program JTAG it is
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possible to program a FPGA or PROM.
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Sample:
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bit2svf$ ./bit2svf ejemplo_prom.bit ejemplo_prom.svf XC18V01
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Bit file created on 2004/08/25 at 13:43:18.
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Created from file ejemplo.ncd for Xilinx part 2s100pq208.
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Bitstream length is 97652 bytes.
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Process finsished sucefully.
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