Timothy Pearson
6 years ago
parent
d64d218d18
commit
9db454faca
@ -1,104 +1,104 @@
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// This file is part of the Universal Laboratory (uLab)
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//
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// © 2007 - 2019 Raptor Engineering, LLC
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// All Rights Reserved
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//
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// Licensed under the terms of the AGPL v3
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module guest_fpga_top(clk, reset, four_bit_input, four_bit_output, eight_bit_input, eight_bit_output, sixteen_bit_input, sixteen_bit_output, lcd_data_in_address, lcd_data_in_data, lcd_data_in_enable, led_segment_bus, led_digit_select);
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input clk;
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input reset;
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input [3:0] four_bit_input;
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output reg [3:0] four_bit_output;
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input [7:0] eight_bit_input;
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output reg [7:0] eight_bit_output;
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input [15:0] sixteen_bit_input;
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output reg [15:0] sixteen_bit_output;
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output reg [5:0] lcd_data_in_address;
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output reg [7:0] lcd_data_in_data;
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output reg lcd_data_in_enable;
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output reg [7:0] led_segment_bus;
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output reg [3:0] led_digit_select;
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reg [7:0] lcd_sample_counter = 48; // Create a sample LCD display counter register
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reg [31:0] lcd_character_change_timer = 0; // Wait a certain number of cycles before loading a new character
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reg [5:0] lcd_current_character = 0; // The current character's address
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always @(posedge clk) begin
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four_bit_output = four_bit_input; // Loopback
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eight_bit_output = eight_bit_input[3:0] + eight_bit_input[7:4]; // Sample adder
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sixteen_bit_output = sixteen_bit_input[15:8] * sixteen_bit_input[7:0]; // Sample multiplier
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// Sample LCD display routine
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lcd_data_in_address = lcd_current_character; // Character location on the LCD display
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lcd_data_in_data = lcd_sample_counter; // Character code to display
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lcd_data_in_enable = 1; // Enable data transmission
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// Cycle through all character positions
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lcd_current_character = lcd_current_character + 1;
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if (lcd_current_character > 31) begin
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lcd_current_character = 16;
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end
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// Cycle through the numbers 0 to 9 at one second intervals
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lcd_character_change_timer = lcd_character_change_timer + 1;
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if (lcd_character_change_timer > 6000000) begin // Wait one second in between character changes
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lcd_character_change_timer = 0;
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lcd_sample_counter = lcd_sample_counter + 1;
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if (lcd_sample_counter > 57) begin // Character code for the digit 9
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lcd_sample_counter = 48; // Character code for the digit 0
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end
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end
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end
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// 7-segment LED display driver clock generator
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reg sseg_clock;
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reg [4:0] sseg_clock_counter;
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always @(posedge clk) begin
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sseg_clock_counter = sseg_clock_counter + 1;
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if (sseg_clock_counter > 16) begin
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sseg_clock_counter = 0;
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sseg_clock = ~sseg_clock;
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end
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end
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// 7-segment LED display driver
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// led_segment_bus and led_digit_select are active low
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// The bit sequence, MSB to LSB, is dp a b c d e f g
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// Segment letters are taken from ug130.pdf page 15
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// 0: 8'b10000001
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// 1: 8'b11001111
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// 2: 8'b10010010
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// 3: 8'b10000110
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reg [2:0] current_anode;
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always @(posedge sseg_clock) begin
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current_anode = current_anode + 1;
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if (current_anode > 3) begin
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current_anode = 0;
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end
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case (current_anode)
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0: begin
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led_digit_select = 4'b1110;
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led_segment_bus = 8'b10000001;
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end
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1: begin
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led_digit_select = 4'b1101;
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led_segment_bus = 8'b11001111;
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end
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2: begin
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led_digit_select = 4'b1011;
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led_segment_bus = 8'b10010010;
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end
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3: begin
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led_digit_select = 4'b0111;
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led_segment_bus = 8'b10000110;
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end
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endcase
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end
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endmodule
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// This file is part of the Universal Laboratory (uLab)
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//
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// © 2007 - 2019 Raptor Engineering, LLC
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// All Rights Reserved
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//
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// Licensed under the terms of the AGPL v3
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module guest_fpga_top(clk, reset, four_bit_input, four_bit_output, eight_bit_input, eight_bit_output, sixteen_bit_input, sixteen_bit_output, lcd_data_in_address, lcd_data_in_data, lcd_data_in_enable, led_segment_bus, led_digit_select);
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input clk;
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input reset;
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input [3:0] four_bit_input;
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output reg [3:0] four_bit_output;
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input [7:0] eight_bit_input;
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output reg [7:0] eight_bit_output;
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input [15:0] sixteen_bit_input;
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output reg [15:0] sixteen_bit_output;
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output reg [5:0] lcd_data_in_address;
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output reg [7:0] lcd_data_in_data;
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output reg lcd_data_in_enable;
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output reg [7:0] led_segment_bus;
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output reg [3:0] led_digit_select;
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reg [7:0] lcd_sample_counter = 48; // Create a sample LCD display counter register
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reg [31:0] lcd_character_change_timer = 0; // Wait a certain number of cycles before loading a new character
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reg [5:0] lcd_current_character = 0; // The current character's address
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always @(posedge clk) begin
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four_bit_output = four_bit_input; // Loopback
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eight_bit_output = eight_bit_input[3:0] + eight_bit_input[7:4]; // Sample adder
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sixteen_bit_output = sixteen_bit_input[15:8] * sixteen_bit_input[7:0]; // Sample multiplier
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// Sample LCD display routine
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lcd_data_in_address = lcd_current_character; // Character location on the LCD display
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lcd_data_in_data = lcd_sample_counter; // Character code to display
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lcd_data_in_enable = 1; // Enable data transmission
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// Cycle through all character positions
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lcd_current_character = lcd_current_character + 1;
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if (lcd_current_character > 31) begin
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lcd_current_character = 16;
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end
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// Cycle through the numbers 0 to 9 at one second intervals
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lcd_character_change_timer = lcd_character_change_timer + 1;
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if (lcd_character_change_timer > 6000000) begin // Wait one second in between character changes
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lcd_character_change_timer = 0;
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lcd_sample_counter = lcd_sample_counter + 1;
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if (lcd_sample_counter > 57) begin // Character code for the digit 9
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lcd_sample_counter = 48; // Character code for the digit 0
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end
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end
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end
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// 7-segment LED display driver clock generator
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reg sseg_clock;
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reg [10:0] sseg_clock_counter;
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always @(posedge clk) begin
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sseg_clock_counter = sseg_clock_counter + 1;
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if (sseg_clock_counter > 1023) begin
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sseg_clock_counter = 0;
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sseg_clock = ~sseg_clock;
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end
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end
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// 7-segment LED display driver
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// led_segment_bus and led_digit_select are active low
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// The bit sequence, MSB to LSB, is dp a b c d e f g
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// Segment letters are taken from ug130.pdf page 15
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// 0: 8'b10000001
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// 1: 8'b11001111
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// 2: 8'b10010010
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// 3: 8'b10000110
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reg [2:0] current_anode;
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always @(posedge sseg_clock) begin
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current_anode = current_anode + 1;
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if (current_anode > 3) begin
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current_anode = 0;
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end
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case (current_anode)
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0: begin
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led_digit_select = 4'b1110;
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led_segment_bus = 8'b10000001;
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end
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1: begin
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led_digit_select = 4'b1101;
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led_segment_bus = 8'b11001111;
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end
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2: begin
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led_digit_select = 4'b1011;
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led_segment_bus = 8'b10010010;
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end
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3: begin
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led_digit_select = 4'b0111;
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led_segment_bus = 8'b10000110;
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end
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endcase
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end
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endmodule
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