Timothy Pearson
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976f4c5dfe
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Use 10-pin headers for ulab debug interface serial port on Spartan 6
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12 years ago |
|
Timothy Pearson
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3f00d517b8
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Add sample image processing module to Spartan 6 demo project
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12 years ago |
|
Timothy Pearson
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401379667e
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Properly report device programming errors
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12 years ago |
|
Timothy Pearson
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400d0abcff
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Avoid usage of TQTimer::singleShot in the FPGA viewer part
Repair "think-o" in the Spartan 6 block RAM HDL
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12 years ago |
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Timothy Pearson
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9d5b0368df
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Add sample design for Spartan 6 and ISE 14.4
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12 years ago |
|
Timothy Pearson
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40acabc2bf
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Update remote debug module and clean up FPGA section of the source tree
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12 years ago |
|
Timothy Pearson
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1e0e205356
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Add verified Xilinx programming script and device type extractor
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12 years ago |
|
Timothy Pearson
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f1ead12600
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Minor cleanup
|
12 years ago |
|
Timothy Pearson
|
f0c477eef4
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Add magic 64 bytes to S6 svf file
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12 years ago |
|
Timothy Pearson
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d94bf35fe7
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Add initial untested support for Spartan 6 devices
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12 years ago |
|
Timothy Pearson
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9c6d284d49
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Initial rpi jtag support
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12 years ago |
|
Timothy Pearson
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7643298424
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Update makefiles
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12 years ago |
|
Timothy Pearson
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d1b70f8018
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Add initial files for direct FPGA programming
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12 years ago |
|
Timothy Pearson
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db7e77be8f
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Add public domain FPGA files for Xilinx s3/s3e
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13 years ago |
