359 Commits (eb6afe10e66825d9275a9b752b40e95cbf6ec830)
 

Author SHA1 Message Date
Timothy Pearson 6ae28a47f7 Add left trace sidebar option to trace viewer widget
10 years ago
Timothy Pearson 72e80dda8e Add ability to hard reset user device
11 years ago
Timothy Pearson 2dc576d25f Hard reset user device on connection and disconnection of FPGA viewer
11 years ago
Timothy Pearson ed6e66626b Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
11 years ago
Timothy Pearson 2cea70caec Automatically prompt for username/password if Kerberos ticket is invalid
11 years ago
Timothy Pearson 779eb9804b Fix FPGA server FTBFS on amd64
11 years ago
Timothy Pearson e32d9c1767 Fix serial server init file
11 years ago
Timothy Pearson 737ddb96ff Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
11 years ago
Timothy Pearson 8783469649 Fix incorrect file names
11 years ago
Timothy Pearson 55f109d365 Add serial console client
11 years ago
Timothy Pearson c912b0f1d3 Add serial console server
11 years ago
Timothy Pearson 06f302400e Fix prototerminal reception of multiple lines of text
11 years ago
Timothy Pearson 1825d32921 Add prototyping terminal to uLab client for TDE
11 years ago
Timothy Pearson 038275fcc0 Add serial I/O to host FPGA
11 years ago
Timothy Pearson dc91899c25 Add initial version of a logic analyzer server
11 years ago
Timothy Pearson 061289c613 Max out logic analyzer memory
11 years ago
Timothy Pearson 13aee3afa9 Merge branch 'master' of http://scm.trinitydesktop.org/scm/git/remotelaboratory
11 years ago
Timothy Pearson 1eb48edeba Add logic analyzer block to control FPGA
11 years ago
Timothy Pearson 32b7b87d3d Lower the uLab FPGA viewer GPMC clock to reduce errors on prototype lashup
11 years ago
Timothy Pearson 0ffb793cb5 Relayout the GUI to be more in line with expected norms
11 years ago
Timothy Pearson 37420cfb78 Increase DSP memory size
11 years ago
Timothy Pearson 4436bddc8c Add GPMC interface to FPGA server
11 years ago
Timothy Pearson 4123289a7a Update common modules
11 years ago
Timothy Pearson a4eb2fb6bf Move hardware design files to their correct locations
11 years ago
Timothy Pearson 04ab7c6632 Add initial GOMC compatible uLab debug system hardware design files
11 years ago
Timothy Pearson 963b88fb0b Add initial GPMC test program and associated files for BeagleBone Black
11 years ago
Timothy Pearson 38c56c7c1f Add initial version of SVF player for Beaglebone Black
11 years ago
Timothy Pearson 26c1236cdc Fix prior commit
11 years ago
Timothy Pearson 5c2d024b38 Fix progress bar not moving during DSP data reception
11 years ago
Timothy Pearson 8ce60c7f52 Fix prior commit
11 years ago
Timothy Pearson f27e0f0184 Allow data processing RAM size to be configured by changing a Verilog parameter on the FPGA side
11 years ago
Timothy Pearson 8faa3da109 Fix image distortion when certain greyscale values are utilized
11 years ago
Timothy Pearson b783a26949 Increase FPGA viewer refresh rate and add configuration option for same
11 years ago
Timothy Pearson 145c83d1b3 Add ability to tune polling speed
11 years ago
Timothy Pearson ff484b9d9c Fix 7 segment display malfunction at low multiplexing rates
11 years ago
Timothy Pearson 7997af3f4f Fix 7-segment LED display and add sample driver for the same
11 years ago
Timothy Pearson e9bed7d3af Update API to TDE R14
11 years ago
Timothy Pearson 051031488b Use latest admin module
11 years ago
Timothy Pearson 37165b919f Use latest tdelibs for build dep
11 years ago
Timothy Pearson 976f4c5dfe Use 10-pin headers for ulab debug interface serial port on Spartan 6
11 years ago
Timothy Pearson 3f00d517b8 Add sample image processing module to Spartan 6 demo project
11 years ago
Timothy Pearson 401379667e Properly report device programming errors
11 years ago
Timothy Pearson 98d8958426 Fix data transmission to FPGA when file size is not exactly 16384 bytes
11 years ago
Timothy Pearson 84b137a12b Fix SQL syntax in prior commit
11 years ago
Timothy Pearson 128d497c25 Add method to mark ulab servers as online or offline
11 years ago
Timothy Pearson 400d0abcff Avoid usage of TQTimer::singleShot in the FPGA viewer part
11 years ago
Timothy Pearson 9d5b0368df Add sample design for Spartan 6 and ISE 14.4
11 years ago
Timothy Pearson 40acabc2bf Update remote debug module and clean up FPGA section of the source tree
11 years ago
Timothy Pearson 078cfe2e28 Properly handle IDLE response while in programming state
11 years ago
Timothy Pearson 2c95bfffaf Add debug log message to SERV command
11 years ago