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remotelaboratory
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6 Commits (9db454facad4e36dae8315b5366642fcaf1ec10b)

Author SHA1 Message Date
Timothy Pearson 9db454faca Slow demo file 7-segment clock to a more reasonable KHz value
6 years ago
Timothy Pearson d64d218d18 Fix incorrect pin assignment for 7-segment LED display
6 years ago
Timothy Pearson 1733ea93c9 Enable remaining I/O busses on Lattice control FPGA
6 years ago
Timothy Pearson f8f6ee88d8 Add test program for Lattice guest FPGAs
6 years ago
Timothy Pearson cd7e1ea3b8 Add user logic reset support to serial version of FPGA control interface
6 years ago
Timothy Pearson e1a4f6f17e Add intial version of Lattice remote FPGA interface
6 years ago